1. Field Of The Invention
This invention relates generally to a masking technique for array computers, and more particularly, to a fine grain masking technique for an SIMD computer which includes multiple instruction level masking.
2. Description of the Related Art
Typically, computers are uni-processors which operate on a single instruction and a single data stream (SISD). That is, the uni-processor computer includes a single processing element that will operate on a single instruction in a program with only one set of data available every clock cycle. It is further known in the art to include multiple processing elements in a computer in which all of the processing elements operate on a single instruction and multiple data streams (SIMD). In these types of SIMD computers or processors, different data is usually applied to each individual processing element, but each processing element receives the same instruction sequence during the same clock cycle. Among the advantages of the SIMD computer over the uni-processor is the reduction in costs of the control unit and the reduction in program memory required.
In the SIMD computer, as well as other types of computers, a fundamental concept, generally referred to as masking, is required for conditional execution of individual operations in the processing elements. Masking enables the different instructions of an instruction sequence which is applied to the processing elements to only be implemented in those processing elements in which the particular data being applied to the separate processing elements meets the conditions of the particular instructions within the sequence. Different techniques are known in the art which mask a particular processing element from certain instructions in an instruction sequence applied to the processing elements. A detailed summary of contemporary SIMD machines using masking can be found in Horde, R. Michael, "Parallel Supercomputing in SIMD Architectures" 1990 CRC Press Inc , Boca Raton, Fla. Additionally, U.S. Pat. Nos. 4,907,148 and 5,045,995 also provide discussions of masking in these types of systems.
As mentioned above, the prior art masking in a SIMD computer can mask the instruction for any number of the processing elements of the computer such that the instruction will not operate on the data. However, many instruction formats may include multiple conditional executions or operations. These instructions are generally referred to as very long instruction words (VLIW). Sophisticated SIMD computers can therefore, not only benefit from parallelism due to multiple processing elements, but also from parallelism due to multiple operations per instruction.
It is known in the art to provide for selective masking of multiple operations in a single instruction for a single processor. For at least one discussion of multiple masking techniques, see Steven et al., "HARP: A Parallel Pipeline RISC Processor," Microprocessors and Microsystems, Vol. 13, No. 9, November 1989, pp. 579-587. Steven et al. introduced the concept of conditionalizing all instructions by adding a field to an instruction that specifies a boolean register to test for controlling a conditional execution of an instruction, and a field which controls the sense of the condition, i.e., execute if the boolean register is true or execute if the boolean register is false. A special register is incorporated which is always true resulting in an unconditional operation. This process has been limited, however, to a single processor. Multiple masking in an SIMD architecture does not appear to be shown in the prior art.
Prior art multiple masking techniques are not capable of providing the necessary masking of multiple processing elements to support conditional subroutine calls. Therefore, the prior art masking techniques limit the processing through-put which is practical with current compiler technology and identical hardware costs. What is needed is a masking technique which is capable of masking multiple conditional executions of individual operations within a single instruction in an SIMD computer. It is therefore an object of the present invention to provide such a masking technique in an SIMD computer.